An Ethernet PHY replacement must work with both sides of the connection: the processor’s MAC interface and the cable interface. Matching the advertised network speed does not establish electrical, software or package compatibility. Before starting a redesign, verify the lifecycle status of the complete original ordering code and document the reason for replacement.
Identify the MAC interface and reference clock
Record whether the board uses MII, RMII, RGMII or another interface, and identify which device supplies the reference clock. For example, Microchip specifies LAN8720A as an RMII 10/100 Ethernet transceiver. That makes it a useful reference for an RMII design, but does not establish compatibility with another PHY carrying a similar description.
Check the complete timing relationship between MAC and PHY, including clock direction, voltage levels and reset timing. A candidate requiring a different clock topology can change the oscillator, routing and firmware initialization. Preserve these requirements in the comparison sheet rather than leaving them as informal assumptions.
Review magnetics, pins and startup straps
Compare the transformer and connector circuit with the candidate’s reference schematic. Review termination resistors, bias connections, center taps and protection components. Then check every package pin, exposed pad and power rail against the PCB. Similar package dimensions can conceal a different assignment of analog supplies and digital signals.
Many designs also depend on resistors that select a PHY address or operating mode during reset. Identify these strap nets and any shared LED functions. Confirm the resistor values and the behavior of connected circuitry while the device samples its configuration.
Test software and real network behavior
Update the driver’s device identification and review vendor-specific registers, interrupt handling and power modes. Test cable insertion, removal, repeated reset and recovery after supply interruption. Include auto-negotiation with the actual switches used by customers and sustained bidirectional traffic under realistic processor load.
For procurement, request the exact temperature and package variant plus packaging condition, lot identification and delivery basis. Treat an engineering candidate as a separate line from an approved substitute so purchasing cannot accidentally release an unqualified change.
Frequently asked questions
Can any 10/100 PHY replace LAN8720A?
No. The MAC interface, clock arrangement, voltage requirements, pinout, register behavior and external circuit must all be reviewed. Network speed describes only part of the design.
Does a successful link light finish qualification?
No. A link indication should be followed by packet traffic, error monitoring, reset recovery and testing across the intended voltage and temperature conditions.
Request an Ethernet PHY quotation from SENICO with the manufacturer part number, interface, package and required quantity. Availability and shipment timing are confirmed against the offered material.