SENICO Electronics

Component sourcing guide

Ethernet Switch and PHY Chips for AI Clusters: Sourcing Guide

Ethernet silicon for an AI cluster should be sourced from a defined network architecture. A switch ASIC, a PHY and a complete network switch are different products with different integration obligations. First decide whether the project is designing hardware or purchasing a deployable system, then specify the relevant interfaces and software.

Ethernet silicon for an AI cluster should be sourced from a defined network architecture. A switch ASIC, a PHY and a complete network switch are different products with different integration obligations. First decide whether the project is designing hardware or purchasing a deployable system, then specify the relevant interfaces and software.

Separate aggregate capacity from usable port configuration

Broadcom's BCM78900 Tomahawk 5 overview describes Ethernet switching silicon with up to 51.2 Tb/s aggregate capacity. That total is a device capability, not a guarantee of application throughput or proof that every desired port layout is supported.

Draw the intended port map, including uplinks, downlinks, breakout modes and management ports. Identify supported electrical lane rates and optical interfaces. Review oversubscription and traffic patterns at the network level before deciding which ASIC capability is necessary. For a PHY, identify the host-side interface and the exact cable or medium on the other side.

Confirm design resources and software access

Before ordering silicon, establish access to the required hardware documentation, reference designs, SDK and technical support. Check licensing and distribution rights for the intended product. An available chip without a usable software and support path may be unsuitable for a new commercial design.

Specify the network operating system and management interfaces for complete switches. If the application uses RoCE, define congestion-management and telemetry requirements with the network team, then verify the documented implementation on the chosen platform. Do not assume that a port speed or ASIC family name establishes the complete network behavior.

Evaluate the supporting board and system

Include clocks, power rails, boot storage, management processors, connectors and cooling in the component plan. Verify the power and airflow requirements with the planned optical modules installed. Review PCB materials, routing and assembly capability before committing to a high-density package.

Acceptance should cover the actual port combinations, supported breakout configurations, representative packet sizes and simultaneous traffic patterns. Record loss, latency, error counters and thermal behavior under the intended operating conditions. Keep software and firmware versions in the acceptance record, since a hardware substitution alone cannot establish equivalent behavior.

Frequently asked questions

Can a PHY replace a switch ASIC?

No. They perform different functions. Match the component role and both sides of its interface to the system design.

Does aggregate switch capacity equal application throughput?

No. Topology, protocol overhead, traffic patterns, endpoints and software affect the throughput available to an application.

Submit Ethernet sourcing requirements with complete part numbers, port maps and software dependencies. Stock, price and lead time are confirmed in the quotation.