Replacing an FPGA requires a migration plan that covers the circuit board, programmable design and manufacturing process. A device with enough logic resources can still fail to support the existing memory interface, transceiver configuration or development tools. First establish whether the exact ordering code has a manufacturer discontinuation notice; an unavailable quotation alone does not establish end of life.
Build a reproducible design baseline
Archive the source RTL, constraints, generated IP, tool version, licenses and programming files before selecting candidates. Record which blocks use vendor primitives and which are portable logic. Include soft processors, encrypted IP and external memory controllers in this review. The AMD design conversion methodology treats device selection, I/O planning and design tools as separate migration tasks; copying RTL is only one part of the work.
Compare the board interfaces pin by pin
Create a spreadsheet connecting every used package pin to its board net, I/O standard and bank supply. Highlight clock inputs, configuration pins, reference voltages and transceiver lanes. Package dimensions and ball count are insufficient evidence of compatibility. Check the candidate package drawing against the actual PCB footprint, including exposed or reserved connections and assembly requirements.
Then document regulator changes, power sequencing, configuration memory and thermal assumptions. A replacement that fits the routing may require a different core supply or dissipate more power under the implemented workload. Estimate these differences before purchasing production quantities.
Qualify implementation and manufacturing
Compile the complete design for the proposed device, review all timing paths and investigate new warnings. Test startup, resets, external memory training and each external interface. Include the application’s longest processing path and realistic simultaneous activity, rather than accepting a simple demonstration bitstream. Confirm that production programming, boundary scan and field updates work with the proposed tools.
Keep the current part and migration candidate as separate BOM options until engineering approves the change. For a last-time buy, calculate production demand and service needs separately, and agree on storage and inspection requirements for the offered lot.
Frequently asked questions
Can a larger FPGA replace a smaller one in the same package?
Possibly, but only after the manufacturer’s migration guidance and the implemented pin assignment support it. Resource count does not confirm bank, clock, power or configuration compatibility.
What should an FPGA sourcing request include?
Provide the full part number, speed and temperature grade, package, quantity, required date and whether redesign is permitted. Identify any programming or traceability requirements before comparing offers.
Send SENICO an FPGA RFQ with the approved ordering code and migration constraints. Availability, lot documentation, price and delivery timing require confirmation in the quotation.