NVLink and CXL should be specified as different platform capabilities. Neither name identifies a generic component that can be added to any server. A useful sourcing request names the host platform, intended function, supported topology and exact assembly or device required.
Match the technology to the workload
NVIDIA describes NVLink and NVLink Switch as a scale-up fabric for GPU communication. Procurement therefore needs the supported accelerator generation, switch or baseboard arrangement and associated software. A bridge or cable designed for one platform should not be assumed compatible with another.
The CXL Consortium describes CXL as a cache-coherent interconnect for processors, memory expansion and accelerators. For a memory-expansion project, identify the host's supported CXL version and device type. The presence of a physically suitable PCIe slot alone does not prove that the CPU, firmware and operating system support the required CXL functions.
Purchase at the supported integration level
Determine whether the project needs an accelerator board, a complete baseboard, a switch tray, a cable assembly or a memory-expansion device. Each purchasing unit has different installation and qualification requirements. Bare silicon intended for an OEM design is not equivalent to a field-installable server option.
Request the approved part number and revision from the platform documentation. For NVLink systems, include the applicable driver and fabric-management requirements. For CXL devices, document memory capacity, media type, power requirements and the intended memory allocation model. Make any dependency on a specific BIOS or system software release explicit.
Test functionality beyond device detection
A device appearing in an inventory tool is only an initial check. For a GPU fabric, confirm the expected topology and link health, then test representative communication-heavy workloads. For memory expansion, verify usable capacity, mapping, error reporting and application behavior under the intended operating system.
Check performance with realistic data placement and access patterns. More addressable memory does not automatically produce more bandwidth for every workload, and a nominal interconnect rate is not an application-throughput guarantee. Preserve firmware versions, configuration settings and test conditions with the acceptance report.
Frequently asked questions
Can CXL memory replace GPU-attached HBM?
Do not assume that it can. They occupy different architectural roles, and any proposed memory hierarchy must be supported by the processor and software design.
Can NVLink be added to an arbitrary GPU server?
Only use combinations explicitly supported by the accelerator and server platform. Mechanical fit or a familiar connector is insufficient.
Request supported interconnect assemblies with platform identifiers and the required topology. Stock, price and lead time are confirmed in the quotation.